System-Level Energy Management in Many-Core Systems Utilising Distributed Speed-Power Controllers

  • Anca Molnos. System-Level Energy Management in Many-Core Systems Utilising Distributed Speed-Power Controllers. Invited Lecture at COOLCHIPS 2015 (XVIIIth IEEE Symposium on Low-Power and High-Speed Chips), 2015.
    [BibTeX] [Abstract]

    Energy efficiency is one of the crucial concerns today in computing systems ranging from small connected devices to large data-centers. This issue is addressed a various levels, and recently we have witnessed a lot of progress in methods to control speed and power consumption of digital circuits. Notable examples are fine-grain adaptive voltage and frequency scaling, and the adoption of new technologies such as Fully-Depleted Silicon On Insulator (FDSOI). These advances however bring new knobs to tradeoff power and speed, e.g., supply voltage, body-bias voltage, which, in turn, open interesting questions about how to fully take advantage of their potential at software level. This talk we will present methods to reduce power consumption of applications and the tradeoffs therein. As a research vehicle, we have the case of a low-power many-core architecture with several power domains and distributed speed-power controllers. We will study the impact of adaptive voltage scaling and discuss methods to determine the optimal power modes, both with benefits at system level, in the context of advanced technologies such as FDSOI.

    @Misc{2015-04-MOLNOS,
    author = {Anca Molnos},
    title = {{System-Level Energy Management in Many-Core Systems Utilising Distributed Speed-Power Controllers}},
    howpublished = {Invited Lecture at COOLCHIPS 2015 (XVIIIth IEEE Symposium on Low-Power and High-Speed Chips)},
    date = {2015-04-13},
    address = {Yokohama, Japan},
    abstract = {Energy efficiency is one of the crucial concerns today in computing systems ranging from small connected devices to large data-centers. This issue is addressed a various levels, and recently we have witnessed a lot of progress in methods to control speed and power consumption of digital circuits. Notable examples are fine-grain adaptive voltage and frequency scaling, and the adoption of new technologies such as Fully-Depleted Silicon On Insulator (FDSOI). These advances however bring new knobs to tradeoff power and speed, e.g., supply voltage, body-bias voltage, which, in turn, open interesting questions about how to fully take advantage of their potential at software level. This talk we will present methods to reduce power consumption of applications and the tradeoffs therein. As a research vehicle, we have the case of a low-power many-core architecture with several power domains and distributed speed-power controllers. We will study the impact of adaptive voltage scaling and discuss methods to determine the optimal power modes, both with benefits at system level, in the context of advanced technologies such as FDSOI.},
    year = {2015}
    }

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